Senior Engineer, Design Verification

About Marvell

Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI and carrier architectures our innovative technology is enabling new possibilities.

At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.

Your Team Your Impact

What You Can Expect

In this in-office role in Morrisville NC youll work day to day with an RTL engineer to verify their design. Their design is in Verilog; youll use System Verilog to debug. Youll run simulations using Synopsys VCS or a similar program and then debug as needed until the design meets required specifications. Youll attend weekly staff meetings to go over what everyone is working on and update your progress or address any issues. As you take responsibility for larger blocks you may have to present to a review committee and explain your test plan and test schedule for those larger blocks.

What Were Looking For

To be successful in this role you must:

Have completed a Bachelors Degree in Electrical Engineering or Computer Engineering and have 2 to 3 years of related professional experience OR a Masters Degree and/or PhD in those fields.

Your coursework must have included some analog classes Verilog or VHDL basic circuits and computer architecture. You should have a focus in VLSI and UVM verification or show projects in your courses that directly relate to chip design verification.

You have used a tool like Synopsys Cadence or Mentor to run simulations and you can write and debug a testbench.

Be comfortable working in a Linux environment and doing scripting with Python.

Be extremely detail-oriented and ready to iterate a design over and over again until it is refined completely.

Work and communicate well with your team keeping them in the loop about your progress issues you encounter and any deviations from the planned schedule.

Experience with DDR Controller DIMM verification is a plus.

Expected Base Pay Range (USD)

The successful candidates starting base pay will be determined based on job-related skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .

Interview Integrity

To support fair and authentic hiring practices candidates are not permitted to use AI tools (such as transcription apps real-time answer generators like ChatGPT or Copilot or automated note-taking bots) during interviews.

These tools must not be used to record assist with or enhance responses in any way. Our interviews are designed to evaluate your individual experience thought process and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations including the Export Administration Regulations (EAR). As such applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens lawful permanent residents or protected individuals as defined by 8 U.S.C. 1324b(a)(3) all applicants may be subject to an export license review process prior to employment.