Digital Design Engineer

About Marvell

Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI and carrier architectures our innovative technology is enabling new possibilities.

At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.

Your Team Your Impact

What You Can Expect

• Develop and maintain leading-edge RTL validation flows such as RTL linting/CDC or timing constraint validation addressing the needs of Marvells various Business Units.
• Keep up with process and tool evolutions enable new technologies into design team execution flows.
• Leverage AI tools to enhance the efficiency and accuracy of CAD flows.
• Contribute to the deployment and support of these flows.
• Work in collaboration with the rest of the team to ensure optimal integration inside the overall CAD platform.
• Generate collect centralize and disseminate knowledge around RTL methodology.
• Interface with EDA vendors for optimal tool usage.

What Were Looking For

• Bachelors degree in Computer Science Electrical Engineering or related fields and 3-5 years of related professional experience OR Masters degree and/or PhD in Computer Science Electrical Engineering or related fields with 2-3 years of experience.
• Good level in scripting in Tcl and Python in the context of flow development.
• Proficiency in Verilog / System Verilog Design and Verification.
• Experience in RTL linting tools including clock domain crossing (CDC).
• Experience in git revision control.
• Knowledge in Equivalence Checking for both RTL to gates and gates to gates in LEC or in Formality is highly desirable
• Demonstrate good analysis and problem-solving skills. Out-of-the-box thinking.
• Team player with good verbal and written communication skills.
• A keen eagerness to learn new skills is also important.

Preferred Qualifications:

• Knowledge in writing validating and debugging timing constraints (SDC)
• Experience writing code using AI assistants.
• High speed and low power implementation techniques/trade-offs.
• Knowledge in Synthesis tools and downstream integration with P&R tools.
• Knowledge in UPF definition and multiple power domains implementation.
• Implementing Functional ECOs ideally having setup ECO flows either LEC eco or Formality ECO.
• Static Timing Analysis setup and analyze STA results.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits you will enjoy our workstyle within an environment of shared collaboration transparency and inclusivity. Were dedicated to giving our people the tools and resources they need to succeed in doing work that matters and to grow and develop with us. For additional information on what its like to work at Marvell visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.

Interview Integrity

As part of our commitment to fair and authentic hiring practices we ask that candidates do not use AI tools (e.g. transcription apps real-time answer generators like ChatGPT CoPilot or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience thought process and communication skills in real-time. If a candidate uses such tools during an interview they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations including the Export Administration Regulations (EAR). As such applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens lawful permanent residents or protected individuals as defined by 8 U.S.C. 1324b(a)(3) all applicants may be subject to an export license review process prior to employment.