Staff Design Engineer
Share
Job Location:
Santa Clara County, CA - USA
Monthly Salary:
Not Disclosed
Posted on:
2 days ago
Vacancies:
1 Vacancy
Job Summary
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
As a Digital IC Staff Design Engineer with Marvell youll be a member of the Central Engineering business group. If you picture Marvell as a wheel Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel including Automotive Storage Security and Networking. Youll be part of a digital team making a big impact on this organization.This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies familiar names to all candidates.
What You Can Expect
ASIC design engineer responsible for the design verification and evaluation of digital circuits in high-speed data communication ICs. The candidate will be involved in engineering implementation spec writing from system requirements RTL design verification synthesis static timing analysis.
The responsibilities include but not limited to.
- Improve the design methodology and flow.
- RTL designs for various type of SerDes IPs ranging for 448Gbps data-rates for different applications.
- Document modeling and verification results for formal review.
- Collaborate with Analog/DSP/DV/FW/AE teams to deliver the competitive SerDes IP solutions for all the Marvell product lines.
- Be a key contributor to bridge the gap between digital and analog design flow.
- Provide the support to the product teams for both pre and post silicon
What Were Looking For
Masters degree in Computer Science Electrical Engineering or related fields and 3-5 years of related professional experience or PhD in Computer Science Electrical Engineering or related fields with 2-3 years of experience.
Must have good RTL experience including specification design verification and synthesis. Must have strong UNIX-based EDA tool skills and knowledge of ASIC design flows.
Must be proficient in the following skills:
- Verilog/VHDL coding and Lint tools
- Strong Perl and Tcl scripting skill
Highly desirable skills:
- IEEE/UCIe/PCIe experience
- Micro-controller 8051 or ARM Cortex experience
- Micro-controller firmware experience
- Circuit level or custom design experience
- Synthesis using Synopsys or Cadence tools
- Timing analysis using Primetime
- DFT concepts of Scan BIST
Good personal communication skills and team working spirit. Hardworking and motivated to be part of a highly competent design team.
Expected Base Pay Range (USD)
105470 - 158000 $ per annumThe successful candidates starting base pay will be determined based on job-related skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
At Marvell we offer a total compensation package with a base bonus and and financial wellbeing are part of the package. That means flexible time off 401k plus a year-end shutdown floating holidays paid time off to volunteer. Have a question about our benefits packages - health or financial Ask your recruiter during the interview process.All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .
Interview Integrity
As part of our commitment to fair and authentic hiring practices we ask that candidates do not use AI tools (e.g. transcription apps real-time answer generators like ChatGPT CoPilot or note-taking bots) during interviews.
Our interviews are designed to assess your personal experience thought process and communication skills in real-time. If a candidate uses such tools during an interview they will be disqualified from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations including the Export Administration Regulations (EAR). As such applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens lawful permanent residents or protected individuals as defined by 8 U.S.C. 1324b(a)(3) all applicants may be subject to an export license review process prior to employment.
#LI-TT1Required Experience:
Staff IC
Key Skills
- Computer Science
- Docker
- Kubernetes
- Python
- VMware
- C/C++
- Go
- System Architecture
- gRPC
- OS Kernels
- Perl
- Distributed Systems
About Company
Designed for your current needs and future ambitions, Marvell delivers the data infrastructure technology transforming tomorrow’s enterprise, cloud, automotive, and carrier architectures for the better.
