Sr Formal Verification Engineer ( Remote)
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Job Location:
Raleigh, WV - USA
Monthly Salary:
$ 140000 - 160000
Posted on:
01-11-2025
Vacancies:
1 Vacancy
Job Summary
Job Title: Sr Formal Verification Engineer
Location: Remote (Anywhere in USA)
Full-time: Salary Benefits Bonuses
About the Role
We are seeking a Formal Verification Engineer to join our SoC/ASIC design team. The ideal candidate will have deep expertise in formal property verification clock domain crossing (CDC) analysis and static design checks using industry-standard tools such as SpyGlass JasperGold and related EDA technologies.
You will work closely with RTL design functional verification and physical design teams to ensure design correctness quality and robustness before tape-out.
Key Responsibilities
Develop and execute formal verification strategies and test plans for complex digital designs.
Use Cadence JasperGold or equivalent tools to verify design properties perform bounded proofs and identify corner-case design bugs.
Perform CDC and RDC (Reset Domain Crossing) analysis using Synopsys SpyGlass or similar tools.
Drive linting reset analysis X-propagation and power intent verification using static tools.
Collaborate with RTL designers to define assertions constraints and coverage goals.
Debug formal verification results root-cause issues and recommend RTL fixes.
Maintain and improve the verification environment methodologies and documentation.
Participate in code reviews and contribute to best practices for design quality and verification sign-off.
Required Qualifications
Bachelors or Masters degree in Electrical Engineering Computer Engineering or related field.
5 - 8 years of experience in ASIC/SoC design or verification with a focus on formal verification.
Hands-on experience with:
Cadence JasperGold (Formal Verification)
Synopsys SpyGlass (CDC Lint RDC DFT Low Power)
Strong understanding of digital design principles RTL coding (SystemVerilog/VHDL) and verification methodologies.
Solid knowledge of clock/reset domain crossings metastability and data synchronization techniques.
Familiarity with assertion-based verification (SVA/PSL).
Excellent debugging and problem-solving skills.
Strong communication and collaboration abilities across multi-disciplinary teams.
Preferred Qualifications
Experience with low-power verification (UPF/CPF).
Familiarity with equivalence checking and static timing analysis concepts.
Exposure to functional verification (UVM) or simulation environments.
Prior work in safety-critical or high-reliability systems (e.g. automotive aerospace).
The anticipated annual base salary for this position is between $140000 to $160000 which also includes a comprehensive benefits package.
Full-Time Benefits:
15 days of PTO per calendar year
10 paid Holidays per calendar year
Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
Dental & Vision: Company covers 50% of premiums for Employee and Dependents
Voluntary Benefits: Life Insurance FSA (Health and Dependent Limited Purpose) HAS and Gap Insurance
Employee Assistant Program (EAP)
401k - Traditional & Roth
Life/AD&D and Long-Term Disability
Tuition reimbursement
Equal Opportunity Policy Statement
Encore Semi Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race religion creed color age sex sexual orientation gender gender identity or expression national origin genetics ancestry marital status civil union status medical condition disability (mental and physical) military and veteran status pregnancy childbirth and related medical conditions or any other characteristic protected by applicable federal state or local laws and ordinances.
Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
Location: Remote (Anywhere in USA)
Full-time: Salary Benefits Bonuses
About the Role
We are seeking a Formal Verification Engineer to join our SoC/ASIC design team. The ideal candidate will have deep expertise in formal property verification clock domain crossing (CDC) analysis and static design checks using industry-standard tools such as SpyGlass JasperGold and related EDA technologies.
You will work closely with RTL design functional verification and physical design teams to ensure design correctness quality and robustness before tape-out.
Key Responsibilities
Develop and execute formal verification strategies and test plans for complex digital designs.
Use Cadence JasperGold or equivalent tools to verify design properties perform bounded proofs and identify corner-case design bugs.
Perform CDC and RDC (Reset Domain Crossing) analysis using Synopsys SpyGlass or similar tools.
Drive linting reset analysis X-propagation and power intent verification using static tools.
Collaborate with RTL designers to define assertions constraints and coverage goals.
Debug formal verification results root-cause issues and recommend RTL fixes.
Maintain and improve the verification environment methodologies and documentation.
Participate in code reviews and contribute to best practices for design quality and verification sign-off.
Required Qualifications
Bachelors or Masters degree in Electrical Engineering Computer Engineering or related field.
5 - 8 years of experience in ASIC/SoC design or verification with a focus on formal verification.
Hands-on experience with:
Cadence JasperGold (Formal Verification)
Synopsys SpyGlass (CDC Lint RDC DFT Low Power)
Strong understanding of digital design principles RTL coding (SystemVerilog/VHDL) and verification methodologies.
Solid knowledge of clock/reset domain crossings metastability and data synchronization techniques.
Familiarity with assertion-based verification (SVA/PSL).
Excellent debugging and problem-solving skills.
Strong communication and collaboration abilities across multi-disciplinary teams.
Preferred Qualifications
Experience with low-power verification (UPF/CPF).
Familiarity with equivalence checking and static timing analysis concepts.
Exposure to functional verification (UVM) or simulation environments.
Prior work in safety-critical or high-reliability systems (e.g. automotive aerospace).
The anticipated annual base salary for this position is between $140000 to $160000 which also includes a comprehensive benefits package.
Full-Time Benefits:
15 days of PTO per calendar year
10 paid Holidays per calendar year
Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
Dental & Vision: Company covers 50% of premiums for Employee and Dependents
Voluntary Benefits: Life Insurance FSA (Health and Dependent Limited Purpose) HAS and Gap Insurance
Employee Assistant Program (EAP)
401k - Traditional & Roth
Life/AD&D and Long-Term Disability
Tuition reimbursement
Equal Opportunity Policy Statement
Encore Semi Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race religion creed color age sex sexual orientation gender gender identity or expression national origin genetics ancestry marital status civil union status medical condition disability (mental and physical) military and veteran status pregnancy childbirth and related medical conditions or any other characteristic protected by applicable federal state or local laws and ordinances.
Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
Required Experience:
Senior IC
Key Skills
- Account Management
- Apache Web Server
- Jpa
- ABAP
- Community Support
- Islamic Banking
About Company
Encore Semi provides engineering services and solutions to the Semiconductor and Electronics industries, using highly advanced technologies and tools. Our Teams of Engineers provide custom engineering solutions for semiconductor product companies, OEMs developing IP or SoC, and Subsy ... View more
