Debug SoC Design Engineer
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Job Location:
Irvine, CA - USA
Monthly Salary:
Not Disclosed
Posted on:
30+ days ago
Vacancies:
1 Vacancy
Job Summary
In this role you will work on a small team designing CPU-based subsystems for high performance low power wireless SoCs. You will work closely with SoC architects and IP developers to define debug features that meet the power performance and area goals. You will own the design for the debug and trace hub. You will collaborate with other designers to ensure their subsystems implement the necessary debug features. You will guide validation engineers in the use of such features to diagnose issues. This is a highly visible role where you will be at the center of the ASIC debug efforts collaborating with all fields with a critical impact in getting leading-edge products launched to delight millions of customers.
- BS with 3 years relevant experience.
- Familiarity with the ASIC design flow.
- Knowledge of digital design SoC architecture and HDL languages like Verilog.
- Familiarity with design methodologies and industry standard EDA tools.
- Knowledge and understanding of microprocessor debug such as CoreSight and other debug techniques.
- Shown experience writing micro-architecture specifications and converting them to design.
- Experience with AXI/AHB bus fabric and processor sub-systems.
- Understanding of UPF and low-power design & implementation techniques.
- Self-starter and willingness to learn.
Key Skills
- Mechanical Design
- SOC
- System Design
- GD&T
- CAD
- Creo
- SolidWorks
- Mechanical Engineering
- Perl
- Autocad
- HVAC Design
- Catia
About Company
Ask Siri to name the most successful company in the world and it might respond: Apple. And it's not just out of familial pride. Apple consistently ranks highly in profit, revenue, market capitalization, and consumer cachet. In 2018, the company became the first reach a trillion dollar ... View more
