8yrs
Responsible for Full Chip Floorplanning (FCFP) including partitioning block placement and top-level AMD-specific flow knowledge and familiarity with hierarchical SoC with design STA and packaging teams to ensure optimal chip layout and interconnect planning.
8yrs
Responsible for Full Chip Floorplanning (FCFP) including partitioning block placement and top-level AMD-specific flow knowledge and familiarity with hierarchical SoC with design STA and packaging teams to ensure optimal chip layout and interconnect planning.
8yrs
Responsible for Full Chip Floorplanning (FCFP) including partitioning block placement and top-level AMD-specific flow knowledge and familiarity with hierarchical SoC with design STA and packaging teams to ensure optimal chip layout and interconnect planning.