Product Engineer Intern (Network & Connectivity)

21 MAPL

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profile Job Location:

Singapore - Singapore

profile Monthly Salary: Not Disclosed
Posted on: 23 days ago
Vacancies: 1 Vacancy

Job Summary

About Marvell

Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI and carrier architectures our innovative technology is enabling new possibilities.

At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.

Your Team Your Impact

Network & Connectivity (N&C) Product Engineers are recognized as key stakeholders for Marvells portfolio of Ethernet and AI datacenter projects. Product Engineers operate as a focal point for solving problems and charting the path toward successful productization and full lifecycle sustainability while ensuring quality reliability and customer requirements are met all at the same time. You are not simply assigned products to manage you own them by leading and supporting the full end-to-end lifecycle.

A day in the life of an N&C Product Engineer involves
Own new product introduction (NPI) deliverables including product characterization test operation qualification yield ramp and manufacturability
Project Execution Planning and Coordination of Test Operations
Partner with design DFT/DFM process package and test teams to optimize product performance quality and cost across multiple test insertions (Wafer Sort Final Test System Level Test)
Design of Experiments (DOE) and Execution of Root Cause and Corrective Action (RCCA)
Data Interpretation and Conclusions-driven Presentation
Statistical Process Control (SPC) and Risk Assessment/Mitigation
Propose and execute product cost and quality improvements
Data analysis automation

What You Can Expect

In this role you will be partnered with a senior Product Engineer team member who will serve as your mentor teaching and guiding you through the inner workings of Product Lifecycle Management (PLM) New Product Introduction (NPI) and Mass Production Release (MPR).

You will be assigned to support multiple Product Engineering related activities such as:

  • Test Program Verification and Debug
  • Failure Analysis and Device Characterization
  • Execution or Coordination of Automated Test Equipment (ATE) and System Level Test (SLT) Operations
  • Compiling and Presenting Engineering Analysis Reports
  • DPPM Analysis and Yield Reporting

In addition you will be responsible for completing an engineering project under the guidance of your mentor. The project will focus on completion of a core subset of NPI deliverables or solving a technical challenge during NPI. At the end of this project you will get an opportunity to share and present details of your engineering project to a wide audience including other interns.

What Were Looking For

  • Bachelor/Master in EE CE CS or relevant disciplines
  • Solid foundation in semiconductor physics circuit analysis and code debugging at minimum as evidenced by coursework
  • Proven documentation and presentation skills with ability to eloquently summarize key points of complex topics
  • Strong organization and schedule management skills with familiarity in activity/process automation being a plus
  • General understanding of problem-solving techniques or processes
  • Familiarity with SPC or have taken courses in Applied Statistics or related subjects
  • Developed skill using Excel or other applications used for processing data (ex: JMP)
  • Courses taken in Engineering Management or related subjects is a plus

Additional Compensation and Benefit Elements

With competitive compensation and great benefits you will enjoy our workstyle within an environment of shared collaboration transparency and inclusivity. Were dedicated to giving our people the tools and resources they need to succeed in doing work that matters and to grow and develop with us. For additional information on what its like to work at Marvell visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.

Interview Integrity

As part of our commitment to fair and authentic hiring practices we ask that candidates do not use AI tools (e.g. transcription apps real-time answer generators like ChatGPT CoPilot or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience thought process and communication skills in real-time. If a candidate uses such tools during an interview they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations including the Export Administration Regulations (EAR). As such applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens lawful permanent residents or protected individuals as defined by 8 U.S.C. 1324b(a)(3) all applicants may be subject to an export license review process prior to employment.

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Required Experience:

Intern

About MarvellMarvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI and carrier architectures our innovative technology is enabling new possibilities.At Marvell you can affect the arc of individual lives l...
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Key Skills

  • Campaigns
  • Abinitio
  • AutoCAD 3D
  • Hardware & Networking
  • Customer Support
  • Arabic

About Company

Designed for your current needs and future ambitions, Marvell delivers the data infrastructure technology transforming tomorrow’s enterprise, cloud, automotive, and carrier architectures for the better.

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