NXP team members create breakthrough technologies that make the connected world better safer and more secure. Were looking for innovative passionate and talented people like you to join our team.
Responsibility:
Proficiency in whole DFT architecture definition.
Setup and maintain DFT flow familiar with script language.
Be responsible for definition and implementation different schemes of DFT aspects: including scan/MBIST/JTAG insertion ATPG generation test patterns generation.
Experience RTL/netlist simulation good debug capability familiar with Verilog.
Experience with ATE on-line debugging and DFT diagnosis. Experience with Post-silicon DPPM improvement coverage hole analysis.
Requirement:
Bachelor or masters degree in Microelectronics Electronics Electrical Engineering Computer Science or relevant disciplines.
Good knowledge and experience in DFT implementation methodology flow optimization and DFT coverage improvement. Mentor tool is a plus.
Strong skills of solving problem self-motivated and good team player.
More information about NXP in Greater China...
#LI-6650
NXP team members create breakthrough technologies that make the connected world better safer and more secure. Were looking for innovative passionate and talented people like you to join our team.Responsibility: Proficiency in whole DFT architecture definition. Setup and maintain DFT flow familiar wi...
NXP team members create breakthrough technologies that make the connected world better safer and more secure. Were looking for innovative passionate and talented people like you to join our team.
Responsibility:
Proficiency in whole DFT architecture definition.
Setup and maintain DFT flow familiar with script language.
Be responsible for definition and implementation different schemes of DFT aspects: including scan/MBIST/JTAG insertion ATPG generation test patterns generation.
Experience RTL/netlist simulation good debug capability familiar with Verilog.
Experience with ATE on-line debugging and DFT diagnosis. Experience with Post-silicon DPPM improvement coverage hole analysis.
Requirement:
Bachelor or masters degree in Microelectronics Electronics Electrical Engineering Computer Science or relevant disciplines.
Good knowledge and experience in DFT implementation methodology flow optimization and DFT coverage improvement. Mentor tool is a plus.
Strong skills of solving problem self-motivated and good team player.
More information about NXP in Greater China...
#LI-6650
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