Principal Engineer, Verification

31 MSI

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profile Job Location:

Santa Clara County, CA - USA

profile Monthly Salary: Not Disclosed
Posted on: 30+ days ago
Vacancies: 1 Vacancy

Job Summary

About Marvell

Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.

At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.

Your Team Your Impact

Custom Silicon Engineering (CSE) group is part of Data Center Engineering (DCE) Business Unit closely collaborates with strategic Hyper scalar and Data Center customers in the development of advanced and highly complex custom SoCs from architecture and design all the way through layout packaging prototype validation and production ramp up.

What You Can Expect

  • Work on verification of memory subsystems of Marvells AI/ML Network processing Compute Memory Expander and Accelerated Compute SOCs and IPs.
  • Develop the architecture for a functional verification environment including reference models and bus-functional monitors and drivers using System Verilog and UVM methodology.
  • Analyze designs and architectures to develop test strategies that will ensure functional correctness.
  • Develop verification testplan and write tests using random techniques and coverage analysis and work with designers to ensure it is complete.
  • Debug failures and work with designers to resolve issues.
  • Contribute to the development and future direction of SoC verification methodologies and environments.
  • Provide leadership for a geographically dispersed team of verification professionals in pre-silicon validation of a highly complex SoC design.

What Were Looking For

  • Bachelors degree in Electrical engineering Electronics Computer engineering or related fieldswith10-15 years of experience.


    Masters degreeand/or PhD in Electrical engineering Electronics Computer engineering or related fields with 5-10 years of experience.

  • 10 years of experience in design engineering with focus on verification.

  • At least 5 years of direct hands-on verification experience on NOC DDR and HBM memory subsystem at block subsystem and full chip level contexts.

  • Strong experience developing complex/random verification environments using System Verilog/UVM

  • Strong experience with writing and executing detailed verification test-plan.

  • Strong experience with scripting languages such as Python or Perl and EDA verification tools as well as bug tracking and regression mechanisms.

  • Strong experience with object-oriented design and implementation.

  • Excellent communication skills to interface internally and externally with all levels of the organization and to participate in problem-solving and quality improvement activities.

  • Demonstrates good analytical and problem-solving skills.

  • Must have the ability to define problems issues and opportunities analyze data establish facts and draw valid conclusions from various datasets.

  • Must have the ability to multi-task in a fast-paced environment.

Expected Base Pay Range (USD)

146850 - 220000 $ per annum

The successful candidates starting base pay will be determined based on job-related skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

At Marvell we offer a total compensation package with a base bonus and and financial wellbeing are part of the package. That means flexible time off 401k plus a year-end shutdown floating holidays paid time off to volunteer. Have a question about our benefits packages - health or financial Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .

Interview Integrity

As part of our commitment to fair and authentic hiring practices we ask that candidates do not use AI tools (e.g. transcription apps real-time answer generators like ChatGPT CoPilot or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience thought process and communication skills in real-time. If a candidate uses such tools during an interview they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations including the Export Administration Regulations (EAR). As such applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens lawful permanent residents or protected individuals as defined by 8 U.S.C. 1324b(a)(3) all applicants may be subject to an export license review process prior to employment.

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Required Experience:

Staff IC

About Marvell Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.At Marvell you can affect the arc of indivi...
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About Company

Designed for your current needs and future ambitions, Marvell delivers the data infrastructure technology transforming tomorrow’s enterprise, cloud, automotive, and carrier architectures for the better.

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