Staff Engineer, Analog Layout
Staff Engineer, Analog Layout
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Job Description
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
We are looking for a Senior Staff Analog Layout Engineer to contribute to the development of High-Speed Connectivity Broadband Analog and Computing/Storage-Memory Data-Transport products (including functional blocks such as high-speed digital multi-GHz ADC/DAC PLL/DLL serial and parallel I/O and clock generation/distribution for custom ICs). The candidate must have a proven record of laying out high-performance analog circuits in state-of-the-art CMOS process technologies successfully performed top-level integrations and placed products into volume production multiple times.What You Can Expect
- Own a chip/macro layout
- Own the overall project schedule leveraging the design lead and layout manager as needed.
- Work effectively with various groups including layout design backend frontend ESD packaging CAD etc. Represent layout within the project cross-function team with leading a team including remote design teams
- Help implement project specific guidelines and ensure team-members follow them
- Contribute to overall team through tool testing script development flow documentation training etc.
- Keep abreast of technology and tool developments and bring new ideas to the team
What Were Looking For
- Bachelors or Masters degree in Computer Science Electrical Engineering or related fields and at least 5 years of related professional experience.
- Deep understanding of layout methodology from initial chip planning to tape-out.
- Deep understanding parasitic optimizing in layout
- Experiences in advanced process technology and Fin-FET is preferable.
- Have a high level of proficiency in interpretation of CALIBRE DRC ERC LVS etc. reports.
- Have a high-level proficiency/knowledge of Synopsys or CADENCE layout entry tools.
- Programming skills in any of the following are a plus: Skill or Ample or Perl etc.
- Strong technical and analytical background problem solving skills etc.
- Fluent in English
- Team player
Additional Compensation and Benefit Elements
With competitive compensation and great benefits you will enjoy our workstyle within an environment of shared collaboration transparency and inclusivity. Were dedicated to giving our people the tools and resources they need to succeed in doing work that matters and to grow and develop with us. For additional information on what its like to work at Marvell visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
Interview Integrity
As part of our commitment to fair and authentic hiring practices we ask that candidates do not use AI tools (e.g. transcription apps real-time answer generators like ChatGPT CoPilot or note-taking bots) during interviews.
Our interviews are designed to assess your personal experience thought process and communication skills in real-time. If a candidate uses such tools during an interview they will be disqualified from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations including the Export Administration Regulations (EAR). As such applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens lawful permanent residents or protected individuals as defined by 8 U.S.C. 1324b(a)(3) all applicants may be subject to an export license review process prior to employment.
#LI-UN1Required Experience:
Staff IC
Employment Type
Full-Time
