Senior Analog Layout Lead
Senior Analog Layout Lead
Posted on :
08-09-2025
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1 Vacancy
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Job Description
As a Senior Layout Lead youll play a crucial role in translating design concepts into silicon collaborating closely with circuit designers and leveraging sophisticated tools. Your work will involve crafting custom analog designs to optimize the performance of Apples world-class this dynamic and innovative environment youll have endless learning opportunities while collaborating across dedicated multidisciplinary Layout Leads are pivotal in delivering Analog Mixed-Signal IP in a SOC flow. You will collaborate with teams of highly skilled individuals to develop the next generation of world-leading SOCs. Your responsibilities include crafting sophisticated layouts for mixed-signal and analog circuits reviewing floorplans and analyzing intricate circuits with circuit designers. Youll run complete sets of design verification tools plan/schedule work and coordinate vital layout tradeoffs. Interpretation of LVS DRC and ERC reports is key to finding the fastest way to complete the layout exceeding engineering specifications and job is right for you if you are a self-motivated engineer passionate about working with groundbreaking technology. You want to accelerate career growth thrive in a results-oriented environment and contribute to the development of revolutionary Apple products. The roles include crafting upcoming products challenging oneself and broadening skillsets in a dynamic innovative work culture.
- Extensive years of experience in analog/mixed-signal layout design with expertise in deep submicron CMOS circuits and at least 3 years in FinFET technologies.
- Proficiency in SKILL Perl TCL Shell and/or Python Programming/scripting.
- Familiar with Machine Learning and AI concepts.
- Track record in implementing analog layout designs achieving optimal performance (eg. Matching low noise and low power consumption.
- Must recognise failure-prone circuit and layout structures have experience with analog and DFM best practices and be able to identify the best approach to solving problems.
- High proficiency in custom and standard cell-based floor-planning and hierarchical layout assembly.
- Technical understanding of IR drop RC delay electromigration self-heating and coupling capacitance.
- High proficiency in interpreting physical verification reports (DRC ERC LVS etc.)
- Experience using Cadence Virtuosos advanced features (XL EAD APR and Constraint Manager)
- Excellent communication skills and ability to collaborate effectively with multi-functional teams.
- Additional skill:
- Cadence Innovus
- CAD Automation experience
- PCell creation experience
- B.S. EE & CS or equivalent
- Excellent knowledge of Mixed-Signal and RF Integrated Circuits is helpful
- MSEE or Ph.D. in Electrical and Computer Engineering preferred
- Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants including minorities women protected veterans and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about disclose or discuss their compensation or that of other applicants.
Required Experience:
Senior IC
Employment Type
Full Time
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