- Implement the physical design of packages and modules for SoC Memory RF and cellular chips. - Interface and coordinate with multi-functional groups throughout Apple on new product package/SiP/module feasibility analysis design and selection. - Define and develop design verification and automation strategy to strengthen and streamline package design as well as release flows.- Work multi-functionally to optimize package pin out. - Perform extraction of S-parameters and package RLGC model. - Ensure package design is optimized with SI/PI requirements.- Drive methodology innovations and efficiency improvements in package design together with vendors and developers on feature development and bug resolution.- Explore evaluate and develop new CAD tool design and verification flow. - Partner with Silicon PD team to optimize chip Floorplan and bump placement and minimize package size.
- BS and 3 years of relevant industry experience.
- As the IC Package Design Engineer you demonstrate fundamental knowledge or proven experience in the following:
- Proven fundamentals in the electrical/material/thermal/ or mechanical engineering field(s).
- Familiarity with various sophisticated package configurations and assembly/ substrate technology (wirebond POP etc.).
- Experience in package design and proficient in Cadence Allegro platform tools (PCB Editor Advanced Package Designer APD/SiP) or Mentor Xpedition platform tools.
- Basic understanding in some SI/PI tools (XtractIM PowerSI HFSS Q3D etc.) package model extraction S-parameters and RLGC model.
- Basic knowledge of substrate manufacturing process structure design rules and material property.
- Proven understanding of high-speed interfaces including DDR PCIe NAND etc.
- Exposure to Unix environment scripting languages (PERL Python TCL and or shell) and methodology.
- Preferred Skills:
- Familiarity with CAM350/Valor or Calibre and CAD and experience with package design reviews.
- Knowledge of high-speed layout constraints (crosstalk mitigation differential pairs EMI/RFI PCB/package resonance).
- Design experience with RFIC and 5G packages SIP or module schematic and layout design experience.
- Solid understanding of Design Rules Check and Design for Manufacturing.
- Implement the physical design of packages and modules for SoC Memory RF and cellular chips. - Interface and coordinate with multi-functional groups throughout Apple on new product package/SiP/module feasibility analysis design and selection. - Define and develop design verification and automation ...
- Implement the physical design of packages and modules for SoC Memory RF and cellular chips. - Interface and coordinate with multi-functional groups throughout Apple on new product package/SiP/module feasibility analysis design and selection. - Define and develop design verification and automation strategy to strengthen and streamline package design as well as release flows.- Work multi-functionally to optimize package pin out. - Perform extraction of S-parameters and package RLGC model. - Ensure package design is optimized with SI/PI requirements.- Drive methodology innovations and efficiency improvements in package design together with vendors and developers on feature development and bug resolution.- Explore evaluate and develop new CAD tool design and verification flow. - Partner with Silicon PD team to optimize chip Floorplan and bump placement and minimize package size.
- BS and 3 years of relevant industry experience.
- As the IC Package Design Engineer you demonstrate fundamental knowledge or proven experience in the following:
- Proven fundamentals in the electrical/material/thermal/ or mechanical engineering field(s).
- Familiarity with various sophisticated package configurations and assembly/ substrate technology (wirebond POP etc.).
- Experience in package design and proficient in Cadence Allegro platform tools (PCB Editor Advanced Package Designer APD/SiP) or Mentor Xpedition platform tools.
- Basic understanding in some SI/PI tools (XtractIM PowerSI HFSS Q3D etc.) package model extraction S-parameters and RLGC model.
- Basic knowledge of substrate manufacturing process structure design rules and material property.
- Proven understanding of high-speed interfaces including DDR PCIe NAND etc.
- Exposure to Unix environment scripting languages (PERL Python TCL and or shell) and methodology.
- Preferred Skills:
- Familiarity with CAM350/Valor or Calibre and CAD and experience with package design reviews.
- Knowledge of high-speed layout constraints (crosstalk mitigation differential pairs EMI/RFI PCB/package resonance).
- Design experience with RFIC and 5G packages SIP or module schematic and layout design experience.
- Solid understanding of Design Rules Check and Design for Manufacturing.
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