You will work closely with other designers to refine GPU micro-architectural specifications as well as collaborate with the architecture physical design & verification teams to identify potential issues as early as possible. You will implement the micro-architecture targeting cutting-edge technology nodes balancing energy efficiency performance and area constraints with project schedule maintainability and coding elegance. You will review synthesis and power reports root-cause and resolve timing and power issues and ensure maximal QoR throughout your design. As your design approaches functional completion your task will be to work closely with the verification team to ensure the design behaves as intended and is tested thoroughly. At this point there will be ongoing collaboration with the physical design team to help with any adjustments necessary to produce an optimal layout of the design in its context. Once your design is integrated into the system as a whole you will be simulating and debugging issues both within and around your design. Please note that some international travel may be required as part of this role.
BSc/MSc/BEng/MEng/PhD in related fields.
Previous exposure to complex IP design.
Understanding of implementing modern design techniques.
Exposure to energy-efficient & low-power logic design.
Understanding of logic optimisation synthesis timing analysis.
Fluency with RTL Verilog/VHDL syntax and hardware modelling.
Familiarity with logic simulation and debug environments as well as formal verification.
Ability to work well in a team and be productive under tight schedules.
Excellent communications skills self-motivated and well-organised.
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