Component Engineer - Technical Lead
Component Engineer - Technical Lead
Posted on :
31-08-2025
Employer Active
1 Vacancy
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Monthly Salary
$ 168800 - 241200
Vacancy
1 Vacancy
Posted on :
31-08-2025
Job Description
$160000 - $240000 a year
Location: San Jose CA (Hybrid 3 days onsite/week required)
Industry: Networking / High-Speed Hardware / Semiconductor Supply Chain
Employment Type: Full-time Individual Contributor U.S. Based Only
Compensation:
Base Salary Range: $168800 $241200
Bonus Eligible
Equity (RSUs): May be offered based on fit
Benefits: Full medical dental vision 401(k) with match PTO and more
Overview:
A global technology leader is seeking a Component Engineering Technical Lead to join its high-impact hardware quality and supply chain group. This role will drive the selection qualification and failure analysis of high-speed digital components including PHYs FPGAs CPUs SoCs and Retimers. The individual will work cross-functionally with hardware engineering quality NPI and global suppliers to ensure component integrity supply continuity and long-term reliability across next-generation networking and compute platforms.
This is a high-visibility hybrid position based in San Jose CA requiring strong technical ownership supplier management capabilities and the ability to navigate complex issues from lab to leadership.
Key Responsibilities:
Own end-to-end component qualification and selection processes for high-speed digital ICs
Lead root cause investigations and failure analysis (FA) of component-level issues across silicon system and assembly layers
Collaborate closely with internal design sourcing reliability and NPI teams to ensure alignment across the hardware lifecycle
Influence vendor technology roadmaps drive availability of next-gen components and evaluate early silicon readiness
Define and validate design margin requirements for SERDES-based architectures and interface protocols (e.g. PCIe Ethernet Fibre Channel)
Develop structured documentation for component evaluations FA reports and corrective actions
Required Experience:
815 years of experience in component engineering hardware design or field applications engineering within the networking semiconductor or compute industries
Deep technical exposure to PHYs Retimers FPGAs CPUs or SoCs and their integration into system designs
Hands-on familiarity with FA methodologies including 8D RCA and electrical/mechanical debug tools
Demonstrated success working with external suppliers and internal engineering stakeholders to resolve component issues
Strong communication skills must be able to articulate findings and technical trade-offs to both engineers and senior leadership
Preferred Qualifications:
Experience at a networking OEM or semiconductor vendor
Understanding of HTOL ELFR LU ESD and other reliability screening methodologies
Familiarity with signal integrity concepts eye diagrams and system-level performance trade-offs
Masters degree in Electrical Engineering or related field preferred
Additional Requirements:
Must be based in or willing to relocate to the San Jose CA area
Hybrid schedule: minimum 3 days/week onsite
Must be legally authorized to work in the U.S.
Candidates who have applied to this client within the last 6 months will not be considered
Minimal travel required (<10%)
Employment Type
Full Time
Key Skills
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