CAD/EDA â Silicon Design/Verification Infrastructure Engineer
CAD/EDA â Silicon Design/Verification Infrastructure Engineer
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1 Vacancy
Job Description
Role: CAD/EDA Silicon Design/Verification Infrastructure Engineer
Location: Santa Clara CA (Onsite)
Interview: Phone/Skype
Job Type: Contract
Were hiring a skilled engineer to support advanced SoC/IP design and verification infrastructure. Candidates should bring hands-on experience with #SystemVerilog #UVM #Python #Perl #TCL #Synopsys #Cadence #EDA #LinuxDevelopment and integration testing for multicore architectures.
Additional Information :
All your information will be kept confidential according to EEO guidelines.
Remote Work :
No
Employment Type :
Contract
Employment Type
Contract
