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Position: Sr. Staff Analog/Mixed-Signal Design Engineer
Department: Engineering
Overview:
We are seeking a highly skilled Sr. Staff Analog/Mixed-Signal Design Engineer to lead the architecture and design of high-speed interconnect transceivers (SerDes). In this role you will develop cutting-edge circuits for SerDes IPs clock generation and traditional analog components. You will collaborate across disciplines to optimize performance guide layout implementation and support silicon bring-up and validation.
Key Responsibilities:
Architect and design high-performance analog/mixed-signal circuits including SerDes transceivers
Optimize circuits to meet stringent performance specifications
Perform floor planning and supervise physical layout
Participate in silicon bring-up validation and debugging
Contribute to system architecture and specifications development
Qualifications:
MS in Electrical Engineering or related field (Ph.D. preferred)
7 years of experience in RF/Analog/SerDes SoC design
Strong knowledge of analog and mixed-signal circuits including:
Bandgap references LDOs filters
SerDes building blocks such as CTLE DFE FFE PI and IQ generation
Clock distribution PLLs ADCs DACs
Familiarity with high-speed interface standards (USB PCIe UCIe)
Experience with ESD protection design is a plus
Proficient in EDA tools (Cadence Spectre Totem EMX)
Comfortable with scripting and simulation using Python and MATLAB
Saige Partners one of the fastest growing technology and talent companies in the Midwest believes in people with a passion to help them succeed. We are in the business of helping professionals Build Careers Not Jobs. Saige Partners believes employees are the most valuable asset to building a thriving and successful company culture which is why we offer a benefit package and convenient weekly payment solutions that helps our employees stay healthy and maintain a positive work/life balance. Contact us to learn more about the opportunity below or check out other opportunities at Experience:
Staff IC
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