Design Verification, Senior Staff Engineer
Design Verification, Senior Staff Engineer
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Salary Not Disclosed
1 Vacancy
Job Description
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
The Compute and Custom Solutions Business Unit closely collaborates with strategic customers in the development of advanced and highly complex SoCs from architecture and design all the way through layout packaging prototype validation and production ramp up.What You Can Expect
- In this role you will be working on the verification of highly complex SoCs as well as multi SoC systems
- Architect and develop functional verification environment including reference models and bus-functional monitors and drivers
- Write a test plan using random techniques and coverage analysis and work with designers to ensure it is complete
- Develop tests and tune the environment to achieve coverage goals
- Debug failures and work with designers to resolve issues
- Architecting developing and maintaining tools to streamline the verification of state-of-the-art multicore SoCs
What Were Looking For
Bachelor or Masters degree in Electrical Engineering or related fields with 5 years of experience.
- Proficient in System Verilog and object-oriented programming
- Well versed with UVM/VMM methodology
- Has worked on complex chips such as CPUs GPUs Switches Machine Learning chips etc.
- Has led or participated in full chip subsystem and block level verification
- Test bench development including agents drivers checkers interfaces etc. for a complex design
- Knowledge and experience in memory interface subsystem (DDR LPDDR HBM) NOCs D2D embedded processors (ARM RISCV etc.) and in complex multi-chip verification environment
- Has experienced full verification cycle from architecture to tapeout with good understanding of testplan development debug coverage closure and gate level simulation
- Experience with analysis and closure of code and functional coverage
Additional Compensation and Benefit Elements
With competitive compensation and great benefits you will enjoy our workstyle within an environment of shared collaboration transparency and inclusivity. Were dedicated to giving our people the tools and resources they need to succeed in doing work that matters and to grow and develop with us. For additional information on what its like to work at Marvell visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
#LI-TD1Required Experience:
Staff IC
Employment Type
Full-Time
