Electrical Engineer - Microelectronics Advanced Packaging (23736)
Electrical Engineer - Microelectronics Advanced Packaging (23736)
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Job Description
Job Title: Senior Specialist Advanced Packaging Integration
Job Code: 23736
Job Location: Palm Bay FL
Job Schedule: 9/80 (Every other Friday off!)
Relocation: Relocation assistance may be available to qualified applicants
Job Description:
This position is responsible for the development and execution of advanced packaging assembly processes including hybrid and thermocompression bonding. The lead will plan pathfinding experiments and Design of Experiments (DOEs) to generate process and tool knowledge for chiptowafer and wafertowafer stacking. This role will necessitate strategic planning working across industry to identify partners tools and technologies to develop advanced packaging solutions for high density interconnects. Expertise gained in this position will provide technical insight for our existing technologies and develop new technologies to capture and lead new programs with our military government and commercial customers.
We look forward to reviewing your application!
Essential Functions:
- Lead DOEs and data analysis to create process technology.
- Collaborate with development and manufacturing to define needs for key process technology requirements.
- Engage external vendors and research leaders.
- Perform quantitative problem solving and drive solutions using risk management
- Lead trades to evaluate technology integration strategies process and metrology tools and IP technology transfers.
- Domestic and international travel
Qualifications:
- Bachelors Degree in Materials Science Electrical Engineering Chemical Engineering Mechanical Engineering Chemistry Physics or related field and a minimum of 6 years of prior relevant experience or Graduate Degree and a minimum of 4 years of prior related experience.In lieu of a degree minimum of 10 years of prior related experience.
- 3years experience in semiconductor process engineering with die attach chip to wafer or wafer to wafer bonding
- Ability to obtain a TS/SCI security clearance
- Ability for both domestic and international long term field assignments
Preferred Additional Skills:
- Prior integration experience of 3D packaging using through silicon vias temporary bonding/debonding wafer thinning microbumping and hybrid bonding is preferred.
Employment Type
Full Time
