Employer Active
Job Alert
You will be updated with latest job alerts via emailJob Alert
You will be updated with latest job alerts via emailResponsibilities :
Description
Design and lead high speed IP (GDDR7DDR5LPDDR6) development. Need to be a strong individual contributor in analog domain. Will be required to participate in all aspects of development analog design layout digital design documentation and silicon validation. Would be required to participate in customer facing discussions.
Requirements
15 yrs
Hands on design experience and leading GDDR/DDR/LPDDR IPs
Must have participated in full cycles of analog IP creation right from spec to silicon debug and char
Must have good communication skills and should be team player.
Working experience in GDDR DDR LPDDR) development is must
Required Experience:
Director
Full-Time