Senior Design Verification Engineer HW Compute Group

The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge.

Work hard. Have fun. Make history.

In this role you will be responsible for defining the verification methodology and implementing the corresponding test plan for subsystems and the full chip. You will participate in the design verification and bringup of the chip and subsystems by writing relevant assertions debugging code test benches test harnesses and otherwise interacting with the extended team. You will participate in the lab bringup of these blocks either in FPGA emulation or silicon by potentially writing test scripts analyzing lab data proposing experiments etc.

You will work closely with multidisciplinary groups including Product Design Audio Technology Computer Vision Hardware Engineering and Software Engineering to architect and implement complex functional block that enable development of worldclass hardware devices. In this role you will:

Design world class hardware and software
Communicate and work with team members across multiple disciplines
Deliver detailed test plans for verification of the full chip or subsystem by working with design engineers and architects
Create and enhance constrainedrandom verification environments using SystemVerilog and UVM
Write tests in C to run out of the CPU
Identify and write all types of coverage measures for stimulus and cornercases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tapeout.
Participate in test plan and coverage reviews

The ideal candidate should have experience with RTL development environments fluency in modern hardware description languages and verification methodologies. They should have experience verifying complex IP blocks from scratch that have successfully been integrated in SOCs or other such silicon that have been productized in consumer devices. We are looking for a selfdriven individual who can work with architects HW and SW developers and can quickly resolve blocking issues.




Key job responsibilities
Design Verification of Subsystems such as CPU NPU and SOC.
Drive Verification Methodology using System Verilog / C based test benches.


Bachelors degree or higher in EE CE or CS
10 years or more of practical semiconductor design verification experience including System Verilog UVM assertions and coverage driven verification.
Experience using multiple verification platforms: UVM test bench FPGA emulator software environments and system testing
Experience defining verification methodologies
Experience with test plan development building the necessary test bench infrastructure developing tests and verifying the design
Experience with writing directed tests
Experience identifying bugs in architecture algorithms functionality and performance with strong overall debug skills
Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing
Experience with industry standard tools and scripting languages (Python or Perl) for automation
Understanding and knowledge of object oriented programming concepts






PhD in Computer Science Electrical Engineering or related field
Experience with ARM and various DSP ISA
Experience with CPU block level testing
Experience debugging systemlevel issues
Good programming skills in C/C and scripting skills in Python Tcl and/or Perl
2 years or more of practical experience
Working experience with high performance industry standard buses like AMBA AXI4
Experience with formal verification
Experience with postsilicon validation
Experience with embedded software
Experience with transaction level modeling
Experience with industry standard I/O interfaces
Knowledge of FPGA and emulation platforms
Knowledge of SoC architecture
Excellent verbal and written communication skills

Amazon is committed to a diverse and inclusive workplace. Amazon is an equal opportunity employer and does not discriminate on the basis of race national origin gender gender identity sexual orientation protected veteran status disability age or other legally protected status. For individuals with disabilities who would like to request an accommodation please visit







Amazon is committed to a diverse and inclusive workplace. Amazon is an equal opportunity employer and does not discriminate on the basis of race national origin gender gender identity sexual orientation protected veteran status disability age or other legally protected status.

Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees supervisors and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees supervisors and staff to ensure exceptional customer service; and follow all federal state and local laws and Company policies. Criminal history may have a direct adverse and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above as well as the abilities to adhere to company policies exercise sound judgment effectively manage stress and work safely and respectfully with others exhibit trustworthiness and professionalism and safeguard business operations and the Companys reputation. Pursuant to the Los Angeles County Fair Chance Ordinance we will consider for employment qualified applicants with arrest and conviction records.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process including support for the interview or onboarding process please visit for more information. If the country/region youre applying in isnt listed please contact your Recruiting Partner.

Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $143300/year in our lowest geographic market up to $247600/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on jobrelated knowledge skills and experience. Amazon is a total compensation company. Dependent on the position offered equity signon payments and other forms of compensation may be provided as part of a total compensation package in addition to a full range of medical financial and/or other benefits. For more information please visit This position will remain posted until filled. Applicants should apply via our internal or external career site.