Signal and Power integrity engineer for IC package
Posted on :
15-03-2025
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1 Vacancy
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Job Description
AWS Utility Computing (UC) provides product innovations from foundational services such as Amazons Simple Storage Service (S3 and Amazon Elastic Compute Cloud (EC2 to consistently released new product innovations that continue to set AWSs services and features apart in the industry. As a member of the UC organization youll support the development and management of Compute Database Storage Internet of Things (Iot) Platform and Productivity Apps services in AWS. Within AWS UC Amazon Dedicated Cloud (ADC) roles engage with AWS customers who require specialized security solutions for their cloud services.
The SIP (SignalIntegrity & Packaging) team is part of AnnapurnaLabs Chip development team.
The team is dealing with the external electrical interfaces of the device from their Signal/Powerintegrity and electrical usage perspectives.
The teams work includes close work with the BackEnd team on integrating these interfaces to the Die the package layout design of the BGAs substrate Signal and power integrity simulations and working with the system team to come up with optimal pinout and optimal PCB breakout schemes.
This position is for an experienced engineer with strong background in highspeed electrical interfaces such as DRAM PCIe Ethernet SerDeses.
The line of work is multidisciplinary combining PackageDesign BackEnd integration of electrical IPs SI/PI extractions & simulations.
Key job responsibilities
As a SIP team member you will assume responsibility for all electrical aspects of physical interfaces of advanced I/Os PLL Memory and SerDes interfaces from integration at the Die level through SI/PI simulation and package layout to reference board design aspects.
The scope of your work will include:
Deep dive into electrical IPs integrated into the DIE;
I/O ring design and close work with Backend team on floorplanning all I/O interfaces at the DIE level.
Lead test studies of Die bumpout arrangements and Package substrate breakout.
Lead layout test studies of package pinout arrangements and PCB board breakout.
Design large and complex package substrates.
Carry advanced SI/PI extractions and simulations to validate the design from the silicon to the peer device at the board level.
About the team
About AWS
Diverse Experiences
Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description we encourage candidates to apply. If your career is just starting hasnt followed a traditional path or includes alternative experiences dont let it stop you from applying.
Why AWS
Amazon Web Services (AWS) is the worlds most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating thats why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.
Work/Life Balance
We value worklife harmony. Achieving success at work should never come at the expense of sacrifices at home which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home theres nothing we cant achieve in the cloud.
Inclusive Team Culture
Here at AWS its in our nature to learn and be curious. Our employeeled affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences including our Conversations on Race and Ethnicity (CORE) and AmazeCon (diversity) conferences inspire us to never stop embracing our uniqueness.
Mentorship and Career Growth
Were continuously raising our performance bar as we strive to become Earths Best Employer. Thats why youll find endless knowledgesharing mentorship and other careeradvancing resources here to help you develop into a betterrounded professional.
BSc in Electrical Engineering.
Experience in Layout (PCB or Package) or BackEnd integration of electrical IPs.
Familiarity with Signal and Power integrity simulation tools.
Strong passion to learn and gain deep understanding.
Knowledge of Chip Package and PCB codesign methodology.
Knowledge in highspeed digital interfaces such as DRAM/PCIe/SerDes.
Knowledge in powerintegrity and powerdelivery of lowvoltage highcurrent an advantage
Hands on experience with lab testing and characterization an advantage.
Familiarity with simulation/extraction tools (e.g. HFSS Sigrity HSpice) an advantage
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process including support for the interview or onboarding process please visit for more information. If the country/region youre applying in isnt listed please contact your Recruiting Partner.
The SIP (SignalIntegrity & Packaging) team is part of AnnapurnaLabs Chip development team.
The team is dealing with the external electrical interfaces of the device from their Signal/Powerintegrity and electrical usage perspectives.
The teams work includes close work with the BackEnd team on integrating these interfaces to the Die the package layout design of the BGAs substrate Signal and power integrity simulations and working with the system team to come up with optimal pinout and optimal PCB breakout schemes.
This position is for an experienced engineer with strong background in highspeed electrical interfaces such as DRAM PCIe Ethernet SerDeses.
The line of work is multidisciplinary combining PackageDesign BackEnd integration of electrical IPs SI/PI extractions & simulations.
Key job responsibilities
As a SIP team member you will assume responsibility for all electrical aspects of physical interfaces of advanced I/Os PLL Memory and SerDes interfaces from integration at the Die level through SI/PI simulation and package layout to reference board design aspects.
The scope of your work will include:
Deep dive into electrical IPs integrated into the DIE;
I/O ring design and close work with Backend team on floorplanning all I/O interfaces at the DIE level.
Lead test studies of Die bumpout arrangements and Package substrate breakout.
Lead layout test studies of package pinout arrangements and PCB board breakout.
Design large and complex package substrates.
Carry advanced SI/PI extractions and simulations to validate the design from the silicon to the peer device at the board level.
About the team
About AWS
Diverse Experiences
Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description we encourage candidates to apply. If your career is just starting hasnt followed a traditional path or includes alternative experiences dont let it stop you from applying.
Why AWS
Amazon Web Services (AWS) is the worlds most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating thats why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.
Work/Life Balance
We value worklife harmony. Achieving success at work should never come at the expense of sacrifices at home which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home theres nothing we cant achieve in the cloud.
Inclusive Team Culture
Here at AWS its in our nature to learn and be curious. Our employeeled affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences including our Conversations on Race and Ethnicity (CORE) and AmazeCon (diversity) conferences inspire us to never stop embracing our uniqueness.
Mentorship and Career Growth
Were continuously raising our performance bar as we strive to become Earths Best Employer. Thats why youll find endless knowledgesharing mentorship and other careeradvancing resources here to help you develop into a betterrounded professional.
BSc in Electrical Engineering.
Experience in Layout (PCB or Package) or BackEnd integration of electrical IPs.
Familiarity with Signal and Power integrity simulation tools.
Strong passion to learn and gain deep understanding.
Knowledge of Chip Package and PCB codesign methodology.
Knowledge in highspeed digital interfaces such as DRAM/PCIe/SerDes.
Knowledge in powerintegrity and powerdelivery of lowvoltage highcurrent an advantage
Hands on experience with lab testing and characterization an advantage.
Familiarity with simulation/extraction tools (e.g. HFSS Sigrity HSpice) an advantage
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process including support for the interview or onboarding process please visit for more information. If the country/region youre applying in isnt listed please contact your Recruiting Partner.
Employment Type
Full-Time
Department / Functional Area
Key Skills
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