Principal Analog Mixed Signal IC Design Engineer
Principal Analog Mixed Signal IC Design Engineer
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1 Vacancy
Job Description
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
As an Analog IC Design Principal Engineer with Marvell youll be a member of the Central Engineering business group. If you picture Marvell as a wheel Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel including Automotive Storage Security and Networking. Youll be part of a small analog team making a big impact on this organization. Additionally Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you but also have the time and freedom to dive deep into the details of your specialization on most projects.What You Can Expect
Seeking a Mixed Signal designer to be part of a key team designing highly sophisticated CMOS transceiver/SERDES products. Responsibilities would span architectural investigations and implementation for circuits such as PLL DLL ADC regulators amplifiers TX RX CDRs etc. to meet key performance targets and performing design verification using industry standard tools such as SPICE Spectre MATLAB etc.
Should be comfortable carrying out layout activities in nanometric technologies and be able to supervise physical design. Should be able to work in the lab independently or with test engineers to characterize debug and validate designs. Would be required to generate design related documents application specifications etc. and support customers and FAEs as needed. May be required to interface with digital and SOC teams to facilitate design integration and crossfunctional verifications.
What Were Looking For
Strong knowledge on the deep submicron CMOS technologies.
Handson experience in designing mixed signal circuits including ADCs DACs RX TX PLLs Filters Bandgap bias circuits regulators and other analog circuits.
Strong knowledge in PCIE related specification circuit design and system level
Experience in post silicon and SOCs/customer support preferably related to PCIE projects
Knowledge and Experience on low power and highspeed design techniques.
Excellent problem solving and analytical skills are essential.
Strong knowledge on IC design CAD tools such as Spectre Spice Matlab Hsim Verilog etc.
Lab testing skills to evaluate the prototype unit to the design specification.
Masters degree and/or PhD in Computer Science Electrical Engineering or related fields with 510 years of experience.
Expected Base Pay Range (USD)
$ per annumThe successful candidates starting base pay will be determined based on jobrelated skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
At Marvell we offer a total compensation package with a base bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off 401k plus a yearend shutdown floating holidays paid time off to volunteer. Have a question about our benefits packages health or financial Ask your recruiter during the interview process.All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .
#LITD1Required Experience:
Staff IC
Employment Type
Full Time
