drjobs Senior Systems Design Engineer SIV 154052

Senior Systems Design Engineer SIV 154052

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1 Vacancy
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Job Location drjobs

San Jose, CA - USA

Monthly Salary drjobs

Not Disclosed

drjobs

Salary Not Disclosed

Vacancy

1 Vacancy

Job Description

What you do at AMD changes everything

We care deeply about transforming lives with AMD technology to enrich our industry our communities and the world. Our mission is to build great products that accelerate nextgeneration computing experiences the building blocks for the data center artificial intelligence PCs gaming and embedded.Underpinning our mission is the AMD culture. We push the limitsof innovation to solve the worlds most important challenges.We strive forexecution excellence while beingdirecthumblecollaborativeandinclusiveof diverse perspectives. This is who we are at our best. One Company. One Team.

AMD together we advance

Senior Systems Design Engineer (SIV)

THE ROLE:

We are looking for a talented selfdriven and motivated individual to be part of Systems Integration and Validation (SIV) Team. The SIV team is responsible for creating emulation/prototyping platforms for the next gen FPGA validation. The team also works in the solution space and develops Kira SOM platforms to support various application verticals like Vision Robotics etc.

THE PERSON:

As part of the team you will be involved in the testing validating and productizing a low latency chiptochip IP commonly used for emulation/prototyping. You will also be involved in developing and validating Kria SOM platforms with various I/Os standards catering to different application spaces.

KEY RESPONSIBILITIES:

  • Enhance and develop test cases for verification and validation of features in the IP
  • Create collateral to showcase IP features/capabilities to customers or at conferences
  • Create SOM platforms using AMDXilinx IPs or custom IPs as required by the application
  • Collaborate with other teams to develop and validate SOM platforms
  • Support customers and debug issues
  • Automate and maintain regressions environments

PREFERRED EXPERIENCE:

  • Developing verifying validating RTL designs for FPGAs/ASICs
  • HDL coding Verilog/VHDL/System Verilog
  • Familiar working within a Linux environment
  • Good communication and documentation skills
  • Understanding of C/C language

Additional experiences which are a plus:

  • Exposure to AMDXilinx tools Vivado
  • Knowledge of Gigabit transceivers and protocols like PCIe Ethernet running on GTs
  • Familiar with I/O standards I2C SPI etc
  • Scripting with Tcl
  • Version control with Git Perforce

ACADEMIC CREDENTIALS:

  • BS/MS in Computer Engineering Electrical Engineering or related equivalent

LOCATION:

San Jose Ca.

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Requisition Number:154052
Country:United StatesState:CaliforniaCity:San Jose
Job Function:Design

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age ancestry color marital status medical condition mental or physical disability national origin race religion political and/or third party affiliation sex pregnancy sexual orientation gender identity military or veteran status. Please click here for more information.


Required Experience:

Senior IC

Employment Type

Full-Time

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