Analog Designer Intern - PhD
Analog Designer Intern - PhD
Employer Active
Job Alert
You will be updated with latest job alerts via email
Share
Job Alert
You will be updated with latest job alerts via email
Job Description
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
The Optical PHY (CEOPHY) team designs highspeed and optical transceivers for communication infrastructure in longhaul metro and datacenter. We address the bandwidth capacity and power issues faced by cloud computing mega data centers that powers the social media giant platforms. Our innovative approaches have resulted in the companys products being first to market in many of key areas developing the most advanced chips and subsystems solutions to address the everincreasing demand of higher data rates driven by videoon demand gaming and other real time data streams. We are seeking talented individuals to work on solving technical challenges with the most outstanding group of collaborators in the industry. Join our team of experts and make a difference in an exciting career opportunity.What You Can Expect
Design simulate and verify analog blocks for industry leading optical transceivers.
Help test and characterize existing designs.
Work with custom layout engineers to implement designs.
System level/behavioral modeling
What Were Looking For
Minimum Qualification:
Candidate must be pursuing an MS or PhD in electrical engineering with an emphasis on analog/mixed signal IC design.
Preferred Qualifications:
Familiarity with tools such as Cadence MATLAB and Python.
Good fundamentals of analog mixedsignal design including transistor device physics.
Solid understanding and experience of designing analog mixedsignal circuit blocks including PLL phase interpolator low jitter clock distribution bandgap biasing circuits LDO regulators amplifiers comparators highspeed DACs and ADCs line drivers etc.
Indepth knowledge of analog mixedsignal concepts like mismatch mitigation linearity stability lowpower and lownoise techniques
Design experience in advanced CMOS technologies design with FINFET technology
Experience with highspeed highlinearity TX linedriver and/or high speed DACs
Experience with highlinearity RX design and its building blocks such as matching networks CTLE PGA etc.
Experience with highspeed ADC design and techniques like timeinterleaving SAR comparators etc.
Candidate should be a selfstarter and possess solid communication skills both written and verbally.
Expected Base Pay Range (USD)
31 61 $ per hour.The successful candidates starting base pay will be determined based on jobrelated skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
For Internship roles we are proud to offer the following benefits package during the internship medical dental and vision coverage perks and discount programs wellness & mental health support including coaching and therapy paid holidays paid volunteer days and paid sick time. Additional compensation may be available for intern PhD candidates.All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .
#LISC1Required Experience:
Intern
Employment Type
Full-Time
