ASIC Digital Design Staff Engineer
ASIC Digital Design Staff Engineer
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Salary Not Disclosed
1 Vacancy
Job Description
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
As a Digital IC Design Staff Engineer with Marvell youll be a member of the Central Engineering business group. If you picture Marvell as a wheel Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel including Automotive and Networking. Youll be part of a small digital team making a big impact on this organization working on Automotive Ethernet and Ethernet PHY frontends.This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies familiar names to all candidates.
What You Can Expect
- Collaborate with Marvell BUs on the digital design of Automotive Ethernet and Copper PHY AFEs.
- Write clear and concise technical specifications to document the behavior of a design block or subsystem or create appropriate test plans.
- Design RTL code in SystemVerilog and/or develop verification environments and test cases in UVM.
- Assist with RTL lint CDC synthesis and timing closure (STA).
- Debug complex design issues using best practices.
- Collaborate with crossfunctional teams including analog/digital mixedsignal design verification and physical design engineers.
- Provide support to the product teams for both pre and postsilicon.
- Maintain a strong internal customer focus with a demonstrated attention to quality.
What Were Looking For
- Knowledge of semiconductor ASIC design methodologies and flows.
- Extensive knowledge of Verilog/SystemVerilog.
- Knowledge of Ethernet PHY design is desirable.
- Understanding of DesignforTest (DFT) concepts including Scan and BIST.
- Excellent analysis problemsolving and critical thinking skills.
- Effective interpersonal teamwork and communication skills.
- Bachelors Masters or PhD in Computer Science Electrical Engineering or related fields with 03 years of related professional experience.
Expected Base Pay Range (USD)
$ per annumThe successful candidates starting base pay will be determined based on jobrelated skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
At Marvell we offer a total compensation package with a base bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off 401k plus a yearend shutdown floating holidays paid time off to volunteer. Have a question about our benefits packages health or financial Ask your recruiter during the interview process.All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .
#LIAR2Required Experience:
Staff IC
Employment Type
Full-Time
