Analog IC Design Engineer Senior Staff
Analog IC Design Engineer Senior Staff
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Job Description
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
As an Analog IC Design Senior Staff Engineer with Marvell youll be a member of the Central Engineering business group. If you picture Marvell as a wheel Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel including Automotive Storage Security and Networking. Youll be part of a small analog team making a big impact on this organization. Additionally Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you but also have the time and freedom to dive deep into the details of your specialization on most projects.What You Can Expect
Seeking a Senior Staff Analog IC Designer to be part of a Marvells central engineering team designing highly sophisticated CMOS transceiver/SERDES/PLL products. Responsibilities would span architectural investigations and implementation for circuits such as PLL DLL ADC regulators amplifiers TX RX CDRs etc. to meet key performance targets and performing design verification using industry standard tools such as SPICE Spectre MATLAB etc.
In this role successful candidate will lead a team of analog design engineers interface with layout verification and application teams and manage delivery of analog IP to successfully bring designs from concept to production.
What Were Looking For
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Masters degree and/or PhD Preferred in Electrical Engineering or related fields with 5 years of experience. A successful candidate should have experience in some of the following designs:
- PLL Data Converters Oscillators and highspeed SerDes design including Receiver and Transmitter design.
- Experience in Singleended High Density Parallel Interface for Chip to Chip Communication DDR5/LPDDR5; GDDR6/LPDDR6 a plus
- Experience with analog design and verification tools (Virtuoso Spectre ADE and post layout extraction tools) is a must
- Knowledge of the fundamentals on signal integrity improvement noise reduction and MultiGHz lowjitter clock generation & distribution.
- Good understanding of analog layouts in FinFet and its effect on highspeed designs
- Experienced in system level pretape out analog validation
- Experienced in lab chip bringup and debugging efforts
- Strong communication skills
Expected Base Pay Range (USD)
$ per annumThe successful candidates starting base pay will be determined based on jobrelated skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
At Marvell we offer a total compensation package with a base bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off 401k plus a yearend shutdown floating holidays paid time off to volunteer. Have a question about our benefits packages health or financial Ask your recruiter during the interview process.All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .
#LITD1Required Experience:
Senior IC
Employment Type
Full-Time
