drjobs Senior ARM RTL Design - Architect

Senior ARM RTL Design - Architect

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1 Vacancy
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Job Location drjobs

Austin - USA

Monthly Salary drjobs

Not Disclosed

drjobs

Salary Not Disclosed

Vacancy

1 Vacancy

Job Description

At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Solutions (North America) team is looking for an experienced RTL designer to contribute to architecture and design for next generation SoCs targeting HyperScalar Automotive IoT and MilAero markets.

Position presents a learning and growth opportunity for candidate to develop into an architect (System) in the future.

Responsibilities:

  • CPU IPselection/configuration/integrationfor ARM and/or RISCV CPU and System IP
  • Design IPselection/configuration/integrationfor Memory and/or Interface IP (PCIe Ethernet USB and other)
  • Digital design and IP creation/ownership from High Level Arch Specification
  • Create detailed Microarchitecture specification work closely with the architect
  • Understanding of performance measurement and refinement. Ability to work withverification/validationteam to create performance verification plan
  • RTL development
  • Support Verification teams. Support test bench development review verification and vPlans. Provide timely specification clarifications and debug support
  • Physical design deliverables. Create functional timing constraints synthesize RTL to ensure power and area targets are met and constraints are correct
  • Plan development schedule in detail and track deliverables to ensure timely IP delivery to all consumers
  • Work with multidisciplinary teams to ensure design block/IP success for all target specifications in Silicon

Qualifications:

10 years of Front End design and/or verification.with a BS/MS Engineering or Computer Sciences

Rich experience in IP creation and/or SoC and IP (CPU Memory Interface) integration

Expert in RTL design (Verilog) simulators debuggers

Hands on Experience in Synthesis SDC creation and support PD and STA teams.

Hands on experience on CDC/RDC setup cleanup and ownership.

Experience in C/C and/or Python (or scripting language)

Experience in driving results in multidisciplinary organization

Desirable:

A Selfmotivated person with good communication and design management skills

Experience with Cadence front end toolset

#LIMA1

Were doing work that matters. Help us solve what others cant.


Required Experience:

Senior IC

Employment Type

Full-Time

Company Industry

About Company

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