Chelsea Search Group

Principal Physical Verification EngineerAbout the Role:We are seeking a Principal Physical Verification Engineering to be part of the Physical Design team delivering complex digital blocks and full-chip implementations in advanced process nodes. This role owns execution of all aspects

Principal Physical Verification EngineerAbout the Role:We are seeking a Principal Physical Verification Engineering to be part of the Physical Design team delivering complex digital blocks and full-chip implementations in advanced process nodes. This role owns execution of all aspects

Principal Physical Verification EngineerAbout the Role:We are seeking a Principal Physical Verification Engineering to be part of the Physical Design team delivering complex digital blocks and full-chip implementations in advanced process nodes. This role owns execution of all aspects

Principal Physical Verification EngineerAbout the Role:We are seeking a Principal Physical Verification Engineering to be part of the Physical Design team delivering complex digital blocks and full-chip implementations in advanced process nodes. This role owns execution of all aspects

Principal Physical Verification EngineerAbout the Role:We are seeking a Principal Physical Verification Engineering to be part of the Physical Design team delivering complex digital blocks and full-chip implementations in advanced process nodes. This role owns execution of all aspects

Principal Physical Verification EngineerAbout the Role:We are seeking a Principal Physical Verification Engineering to be part of the Physical Design team delivering complex digital blocks and full-chip implementations in advanced process nodes. This role owns execution of all aspects

Principal Static Timing Analysis (STA) EngineerAbout the Role:We are seeking a highly experienced Principal STA Engineer to play a key technical leadership role in the development of next-generation semiconductor this role you will own complex blocks and full-chip STA analysis and ac

Principal Static Timing Analysis (STA) EngineerAbout the Role:We are seeking a highly experienced Principal STA Engineer to play a key technical leadership role in the development of next-generation semiconductor this role you will own complex blocks and full-chip STA analysis and ac

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to

Principal Physical Verification EngineerAbout the Role:We are seeking a Principal Physical Verification Engineering to be part of the Physical Design team delivering complex digital blocks and full-chip implementations in advanced process nodes. This role owns execution of all aspects

Principal Physical Verification EngineerAbout the Role:We are seeking a Principal Physical Verification Engineering to be part of the Physical Design team delivering complex digital blocks and full-chip implementations in advanced process nodes. This role owns execution of all aspects

Principal Physical Verification EngineerAbout the Role:We are seeking a Principal Physical Verification Engineering to be part of the Physical Design team delivering complex digital blocks and full-chip implementations in advanced process nodes. This role owns execution of all aspects

Principal Physical Verification EngineerAbout the Role:We are seeking a Principal Physical Verification Engineering to be part of the Physical Design team delivering complex digital blocks and full-chip implementations in advanced process nodes. This role owns execution of all aspects

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to

Technical Director Test Development EngineeringLocation: Irvine CA (onsite)US Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsIn this role you will be responsible for Test Development Engineering for companys leading edge DSP products wor

Technical Director Test Development EngineeringLocation: Irvine CA (onsite)US Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsIn this role you will be responsible for Test Development Engineering for companys leading edge DSP products wor

Technical Director Test Development EngineeringLocation: Irvine CA (onsite)US Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsIn this role you will be responsible for Test Development Engineering for companys leading edge DSP products wor

Technical Director Test Development EngineeringLocation: Irvine CA (onsite)US Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsIn this role you will be responsible for Test Development Engineering for companys leading edge DSP products wor

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to

Principal Static Timing Analysis (STA) EngineerAbout the Role:We are seeking a highly experienced Principal STA Engineer to play a key technical leadership role in the development of next-generation semiconductor this role you will own complex blocks and full-chip STA analysis and ac

Principal Static Timing Analysis (STA) EngineerAbout the Role:We are seeking a highly experienced Principal STA Engineer to play a key technical leadership role in the development of next-generation semiconductor this role you will own complex blocks and full-chip STA analysis and ac

Technical Director Test Development EngineeringLocation: Irvine CA (onsite)US Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsIn this role you will be responsible for Test Development Engineering for companys leading edge DSP products wor

Technical Director Test Development EngineeringLocation: Irvine CA (onsite)US Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsIn this role you will be responsible for Test Development Engineering for companys leading edge DSP products wor

Principal High-Speed Analog Layout EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADCs DACs PLLs) from floor planning through

Principal High-Speed Analog Layout EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADCs DACs PLLs) from floor planning through

Senior High-Speed Analog Layout EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADCs DACs PLLs) from floor planning through fi

Senior High-Speed Analog Layout EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADCs DACs PLLs) from floor planning through fi

Diamondx Semiconductor ATE Test EngineerJob Description:As a Test Engineer you will develop modify and sustain test software on a Cohu Diamondx Semiconductor ATE instrumentation for digital analog and mixed-signal ICs. You will create test software for state-of-the-art advanced techno

Diamondx Semiconductor ATE Test EngineerJob Description:As a Test Engineer you will develop modify and sustain test software on a Cohu Diamondx Semiconductor ATE instrumentation for digital analog and mixed-signal ICs. You will create test software for state-of-the-art advanced techno

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to

Staff or Principal Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to