Analog Design & Layout Engineer

The MOSIS 2.0 PIES Team is Hiring

Background: The California Defense Ready Electronics and Microdevices Superhub (California DREAMS) will promote innovation and lab-to-fab transition for RF and other technologies in the Southern California region. MOSIS 2.0 will play a critical role in providing access to university nanofabs and industry prototyping and production fabs in support of rapid prototyping for Government- and Industry-funded R&D projects. The primary end uses for the service span from advanced RF-spectrum communications and sensing applications such as 5G/6G and related domains to advanced digital design. The Prototype Integration and Engineering Services (PIES) team will operate within MOSIS 2.0 to provide engineering support for users bridging the valley between innovations and production.

This role seeks a skilled engineer who excels in one or more of the following: analog circuit/RF design digital circuit design and physical layout implementation. The successful candidate will work directly with MOSIS2.0 customers to help design and layout circuits across a range of process technologies. Additionally they will support USCs tape out classes and contribute to funded research projects within the USC ECE department. This is an ideal opportunity for someone who enjoys blending hands-on technical work with educational and research support.

Location:
California (On-site at USC/ISI in Marina del Rey and at the USC University Park Campus)

Position Type:
Full-Time Research/Support Role MOSIS2.0 (California DREAMS Microelectronics Commons) / USC ECE Department.

Responsibilities:

• Customer and Project Support:
  • Collaborate with MOSIS2.0 customers to develop high-quality analog circuit designs or digital circuit designs and assist customers with layout implementation.
  • Provide technical guidance on best practices for schematic capture simulation layout creation and design rule compliance across various process technologies (e.g. CMOS BiCMOS III-V).
• Academic and Research Engagement:
  • Assist in the delivery of tape out classes at USC by demonstrating layout techniques and troubleshooting common design issues.
  • Support funded research projects by providing design and layout expertise including post-layout simulation parasitic extraction and layout verification.
• Technical Documentation and Collaboration:
  • Prepare detailed design reports layout closure documentation and technical presentations for both industry and academic stakeholders.
  • Collaborate with USC faculty students and industry partners to continuously improve design methodologies and workflows.

Qualifications:

• Educational Background:
  • Bachelors Masters degree or PhD in Electrical Engineering Electronics or a related field
• Technical Expertise:
  • Minimum 3 years of experience in analog circuit design and/or analog layout.
  • Proficient in industry-standard CAD tools (e.g. Cadence Virtuoso SPICE simulators Mentor Graphics tools or equivalent).
  • Strong understanding of layout verification methods (DRC LVS) and parasitic extraction techniques.
  • Experience with device electromagnetic or photonic component simulations desired but not required.
• Interpersonal and Communication Skills:
  • Excellent communication skills with the ability to work effectively with customers and academic teams.
  • Prior teaching tutoring or workshop facilitation experience is a plus.
• Adaptability:
  • Ability to work across multiple process technologies and adapt designs to meet various manufacturing guidelines.

The annual base salary range for this position is $153012 - $180000. When extending an offer of employment the University of Southern California considers factors such as (but not limited to) the scope and responsibilities of the position the candidates work experience education/training key skills internal peer equity federal state and local laws contractual stipulations grant funding as well as external market and organizational considerations.

USC is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race color religion sex sexual orientation gender identity national origin protected veteran status disability or any other characteristic protected by law or USC policy. USC observes affirmative action obligations consistent with state and federal law. USC will consider for employment all qualified applicants with criminal records in a manner consistent with applicable laws and regulations including the Los Angeles County Fair Chance Ordinance for employers and the Fair Chance Initiative for Hiring Ordinance and with due consideration for patient and student safety. Please refer to theBackground Screening Policy Appendix Dfor specific employment screen implications for the position for which you are applying.

We provide reasonable accommodations to applicants and employees with disabilities. Applicants with questions about access or requiring a reasonable accommodation for any part of the application or hiring process should contact USC Human Resources by phone at or by email at. Inquiries will be treated as confidential to the extent permitted by law.

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