drjobs Design Verification Engineer

Design Verification Engineer

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1 Vacancy
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Job Location drjobs

Bangalore - India

Yearly Salary drjobs

₹ 1000000 - 3000000

Vacancy

1 Vacancy

Job Description

We have immediate openings for two critical positions:RTL Verification LeadandVerification Manager. These are urgent requirements and we are seeking highly qualified candidates who can join our team as soon aspossible. Below are the job details:


Job Title:RTL Verification Lead & Manager

Location: Bangalore

Job Type: FullTime

Payroll: Direct Payroll

Experience: 6 to 12 Years


For Manager roles a minimum of 8 years of relevant RTL verification experience is required.


Job Summary:

We are looking for highly skilled RTL Verification Leads and Managers to join our motivated verification team. The selected candidates will play key roles in IP verification with a focus on protocols such as UCIe HBM PCIe AXI/ACE Ethernet DDR and more. This position requires deep expertise in advanced verification methodologies and a strong background in RTL verification.


Key Responsibilities:

  • Lead and execute RTL verification tasks for IPs like UCIe HBM PCIe and Bus Logic.
  • Implement advanced verification methodologies such as UVM/OVM/VMM/SystemVerilog.
  • Generate constrained random stimulus and perform assertionbased verification and functional coverage.
  • Oversee register verification standards and manage NLP/GLS verification flows.
  • Conduct IP and subsystem level verification for protocols including PCIe UCIe and HBM.
  • Facilitate controller interoperability testing at the subsystem level.

Qualifications:

  • BE/ME/MTech/MS in Electrical Engineering or a related field.
  • 6 to 12 years of RTL verification experience.
  • Proficiency in UVM/OVM/VMM/SystemVerilog.
  • Strong knowledge of constrained random stimulus generation assertionbased verification and functional coverage techniques.
  • Experience with register verification standards and NLP/GLS verification flows.
  • Handson experience in IP and subsystem level verification for protocols like PCIe UCIe and HBM is a strong plus.
  • Prior experience in controller interoperability testing at the subsystem level is desirable.


Employment Type

Full-Time

Company Industry

About Company

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